商品介绍
The SN65LV1023A serializer and SN65LV1224B deserializer comprise a 10-bit serdes chipset designed to transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 10 MHz to 66 MHz. Including overhead, this translates into a serial data rate between 120-Mbps and 792-Mbps payload encoded throughput.; Upon power up, the chipset link can be initialized via a synchronization mode with internally generated SYNC patterns or the deserializer can be allowed to synchronize to random data. By using the synchronization mode, the deserializer establishes lock within specified, shorter time parameters.; The device can be entered into a power-down state when no data transfer is required. Alternatively, a mode is available to place the output pins in the high-impedance state without losing PLL lock.; The SN65LV1023A and SN65LV1224B are characterized for operation over ambient air temperature of –40°C to 85°C.
标准包装
标准包装是从制造商/代理商处获得的最小包装规格。所以最小订货量可能会小于制造商的标准包装的数量。当产品分解成较小数量时,包装类型(即卷、管、盘)可能会发生变化,以实际包装交货为准。